Fabrication and characterization of M-I-FIS ferroelectric-gate structures using HfAlOx buffer layer

Metal-insulator-ferroelectric-insulator-semiconductor (M-I-FIS) ferroelectric-gate structures have been fabricated and characterized using HfAlOx as an upper insulating layer and SrBi2Ta2O9 (SBT) as a ferroelectric layer. Clear hysteresis loop due to the ferroelectric SBT is obtained in the capacitance-voltage characteristics with a memory window of more than 1 V. It is demonstrated that the leakage current density is significantly reduced by inserting the HfAlOx buffer layer and that the data retention time for the M-I-FIS structure is longer than the MFIS structure without HfAlOx buffer layer.