Open-circuit voltage enhancement in CdS/Cu2ZnSnSe4-based thin film solar cells: A metal-insulator-semiconductor (MIS) performance

Low open circuit voltage (Voc) values have been widely reported in kesterite Cu2ZnSnSe4 (CZTSe)-based thin film solar cells. So far, a complete understanding of the main sources of these low performances is far from clear. In this work, a theoretical model for CZTSe solar cell with record efficiency is presented. Among the different device loss mechanisms, trap-assisted tunneling recombination is introduced as the major hurdle to boost Voc values. Detailed comparison of the simulation results to the measured device parameters shows that our model is able to reproduce the experimental observations. Finally, it is found that a further solar cell efficiency enhancement of up to 19.4% with an open circuit voltage close to 708 mV can be achieved by using more resistive CdS layers which is in contradiction to p-n junction behavior. In this way, a MIS performance is proposed to promote Voc and efficiency values. As a result, this approach could help to solve at least one of the main issues of this technology.