کد مقاله | کد نشریه | سال انتشار | مقاله انگلیسی | نسخه تمام متن |
---|---|---|---|---|
6946013 | 1450521 | 2018 | 12 صفحه PDF | دانلود رایگان |
عنوان انگلیسی مقاله ISI
Border traps and bias-temperature instabilities in MOS devices
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کلمات کلیدی
موضوعات مرتبط
مهندسی و علوم پایه
مهندسی کامپیوتر
سخت افزارها و معماری
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چکیده انگلیسی
An overview of the effects of border traps on device performance and reliability is presented for Si, Ge, SiGe, InGaAs, SiC, GaN, and carbon-based MOS devices that are subjected to bias-temperature stress, with or without exposure to ionizing radiation. Effective border-trap densities and/or energy distributions are estimated using capacitance-voltage hysteresis, low-frequency noise, charge pumping, and other electrical techniques that vary the time scale over which charge exchange between the semiconductor channel and near-interfacial dielectric. Oxygen vacancies and hydrogen impurity complexes are common border traps in a wide variety of systems subjected to bias-temperature stress. Charge trapping and emission tend to dominate observed bias-temperature instabilities for as-processed devices at higher oxide electric fields (>Â 4-6Â MV/cm), and for irradiated devices. Hydrogen diffusion and reactions become relatively more significant in as-processed devices at lower electric fields (<Â 4-6Â MV/cm).
ناشر
Database: Elsevier - ScienceDirect (ساینس دایرکت)
Journal: Microelectronics Reliability - Volume 80, January 2018, Pages 266-277
Journal: Microelectronics Reliability - Volume 80, January 2018, Pages 266-277
نویسندگان
D.M. Fleetwood,