Practical analytical modeling of 3D multi-layer Printed Wired Board with buried volumetric heating sources

To determine its ability to predict the maximum operating temperature of a set of buried chips, that practical solution is compared to its corresponding numerical model representing all the layers of realistic electronic board. Moreover the need to consider each PWB's layer is debated with the aim to faster the chip temperature evaluation. Thus a layer-selection method is investigated to find the best balance between accuracy and computation time. By using such optimised approach the computation time can be shortened by a factor of 600, compared to a detailed numerical analysis, while keeping a similar accuracy. Further, it could be a practical way to proceed to a smart simplification of the numerical model of PWB substrate for actual equipment.