Adaptation of admittance analysis to extract interface traps of a-Si:H/c-Si heterojunctions

Complete admittance expressions, adapted from the equations previously presented for Metal/Oxide/Semiconductor (MOS) structure, were derived and modified admittance approach was successfully applied on a-Si:H/c-Si heterojunction to deduce surface state density (Nss) by employing capacitance-voltage (C-V) and conductance-voltage (G/ω-V) measurements. Through the approach, Nss was determined as 6×1012 cm−2 eV−1 that was mutually checked by continuum model, used previously for evaluating Nss in MOS structure. Furthermore, locating such an amount at the interface of a-Si:H and c-Si, experimentally measured C-V curve was reproduced through AFORS-HET simulation program. Presence of such a large amount of Nss was originated due to native oxide layer, confirmed through spectroscopic elipsometry measurement.