کد مقاله کد نشریه سال انتشار مقاله انگلیسی نسخه تمام متن
747171 894501 2011 8 صفحه PDF دانلود رایگان
عنوان انگلیسی مقاله ISI
Modeling of program, erase and retention characteristics of charge-trap gate all around memories
موضوعات مرتبط
مهندسی و علوم پایه سایر رشته های مهندسی مهندسی برق و الکترونیک
پیش نمایش صفحه اول مقاله
Modeling of program, erase and retention characteristics of charge-trap gate all around memories
چکیده انگلیسی

This paper describes the effect of geometry in charge-trap (CT) memory devices. We first theoretically analyze the impact of the curvature radius on the behavior of the gate current in Gate-All-Around devices, and then describe the change to make to planar model in order to fit the cylindrical devices characteristics. This model is used to simulate Nanocrystal and SONOS program, erase and retention behaviors. The dynamics enhancement during program/erase due to the bending of the active region in such cylindrical devices is explained. The scaling perspectives conclude this paper.

Research highlights
► This paper describes the effect of geometry in charge-trap memory devices.
► Impact of the curvature radius on the gate current is theoretically analyzed.
► Nanocrystal and SONOS GAA program, erase and retention behaviors are explained.
► Cylindrical devices eliminate erase saturation while keeping sufficient retention.

ناشر
Database: Elsevier - ScienceDirect (ساینس دایرکت)
Journal: Solid-State Electronics - Volume 58, Issue 1, April 2011, Pages 75–82
نویسندگان
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