Analytical unified threshold voltage model of short-channel FinFETs and implementation

In this work, an analytical compact model for the threshold voltage Vt of double-gate (DG) and tri-gate (TG) FinFETs is proposed. The DG FinFET Vt model is extended to TG FinFET Vt model using effective parameters capturing the electrostatic control of the top gate over the short-channel effects. The results of the model are compared with the results of a numerical device simulator for a wide range of the channel length, the fin height and the fin width. The overall results reveal the very good accuracy of the proposed model. The Vt model has been validated by developing a Verilog-A code and comparing the results derived by the Spectre simulator and the Verilog-A code with simulation results.

► A simple analytical model for the threshold voltage of short-channel DG MOSFETs was derived.
► The model was extended to TG MOSFETs modifying the physical device parameters of the transistor.
► The model shows excellent agreement compared with simulation data for channel length down to 20 nm.
► The Vt model has been also validated by developing a Verilog-A code.