Scale changes in electronics: Implications for nanostructure devices for logic and memory and beyond

After six decades of device size reduction and its efficient use through hierarchical design, semiconductor electronics and its use in integrated digital processing encounters two major conflicting constraints. From size reduction and their small collective behavior, i.e., from the bottom, these constraints include quantum effects, stochastic effects arising from discreteness and noise, and other probabilistic effects. From the large scale integration and their large ensemble behavior, i.e., from the top, these include thermodynamic consequences in the inefficiencies of the data engine as a large numbers of devices are assembled together hierarchically. These conflicting currents are the central intellectual challenge when discussing the future of nanostructure devices and their use in data processing machines. We discuss the conceptual fundamentals of the small and the large that ties these scale changes that exist in time, size, energy, and other dimensions of the machinery. From this, we derive ideas for devices, robustness, data manipulation efficiency, and performance under practical constraints so that the next six decades are as fruitful and useful for the society as the past six have been.

► Techniques for achieving low power circuits are explored.
► Approaches to computation within defined bounded errors for power are described.
► Implementation of Bayesian approaches for decision making in hardware are described.
► Minimum energy and energy-error relationships are described for digital environment.
► Manuscript provides a critique of deterministic approaches in nanoelectronics.