Realizing high voltage SJ-LDMOS with non-uniform N-buried layer

A novel super junction LDMOS (SJ-LDMOS) structure, which reduces substrate-assisted depletion effect, is proposed. The proposed device uses a non-uniform N-buried layer implemented between the SJ region and P substrate to achieve a uniform distribution of surface electric field. Numerical simulation results indicate that the proposed device features high breakdown voltage, low on-resistance. In addition, the proposed device is compatible with smart power technology.