Double-polysilicon SiGe HBT architecture with lateral base link

We present an analysis of a modified double-polysilicon SiGe:C HBT module showing a CML ring oscillator gate delay τD of 2.5 ps, and fT/fmax/BVCEo values of 300 GHz/350 GHz/1.85 V (Fox et al., 2008) [1]. A key feature of the HBT module is a connection of the extrinsic and intrinsic base regions by lateral epitaxial overgrowth, which aims to overcome the limits of the conventional double-polysilicon architecture in simultaneously reducing RB and CBC. Potential benefits and barriers of the proposed device structure on the way to higher performance are reviewed with regard to the recently demonstrated performance gain of the classical double-polysilicon approach. The paper addresses technological challenges one is faced when the here presented device structure is scaled to minimum device dimensions.

Research highlights
► We present a novel double polysilicon SiGe HBT technology.
► We achieve fT/fmax of 300GHz/350GHz and a ring oscillator gate delay of 2.5ps.
► Technological challenges for further device scaling are adressed.