Enhanced DC model for GaN HEMT transistors with built-in thermal and trapping effects

This paper presents an enhanced DC model of a gallium nitride (GaN) high electron mobility transistor (HEMT) and the corresponding extraction procedure. This proposed model is based on new analytical equations that describe the DC behavior of the device, including thermal and trapping effects. A new analytical expression of thermal resistance that is considered to be temperature dependent is proposed. The trapping effect is modeled using an added term in the drain current expression with bias dependence. GaN HEMTs fabricated on a silicon wafer and also on a silicon carbide wafer are considered to validate the model. The thermal and trapping effects are characterized without using the pulsed measurement method which usually requires more complex measurements. Large-signal measurements are also used to assess further the validity of the DC model when it is integrated in and main part of a large-signal model used to design an inverse class-F amplifier.

► In this paper, a new DC model for GaN HEMTs is proposed.
► The thermal and kink effects were taken into account using judicious expressions.
► The extraction of the DC parameters is done without using a pulsed I–V measurement.
► The DC model as an SDD block in ADS is implemented.
► Two type of GaN HEMT with Si wafer and SiC wafer are considered for validation.