کد مقاله | کد نشریه | سال انتشار | مقاله انگلیسی | نسخه تمام متن |
---|---|---|---|---|
748750 | 894784 | 2009 | 4 صفحه PDF | دانلود رایگان |
عنوان انگلیسی مقاله ISI
DC and 1/f noise characteristics of strained-Si nMOSFETs using chemical–mechanical-polishing technique
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موضوعات مرتبط
مهندسی و علوم پایه
سایر رشته های مهندسی
مهندسی برق و الکترونیک
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چکیده انگلیسی
Utilizing chemical–mechanical-polishing (CMP) technique to reduce oxide interface defects and roughness induced from SiGe virtual substrate in strained-Si nMOSFETs has been investigated. Due to the smoother SiO2/Si interface, an additional 3.5% driving current and 11% transconductance enhancements are found in strained-Si devices with a gate length = 0.5 μm on CMP-treated SiGe virtual substrate, compared to strained-Si devices without CMP process. Moreover, strained-Si devices with CMP process exhibit the lowest 1/f noise. Under larger gate voltage overdrive, the enhancements become more obvious indicating that the CMP process provides a smoother surface of the strained-Si/SiGe structure.
ناشر
Database: Elsevier - ScienceDirect (ساینس دایرکت)
Journal: Solid-State Electronics - Volume 53, Issue 8, August 2009, Pages 905–908
Journal: Solid-State Electronics - Volume 53, Issue 8, August 2009, Pages 905–908
نویسندگان
Hau Yu Lin, San Lein Wu, Shoou Jinn Chang, Cheng Wen Kuo, Yen Ping Wang, Shang Chao Hung,