کد مقاله کد نشریه سال انتشار مقاله انگلیسی نسخه تمام متن
749354 1462267 2007 8 صفحه PDF دانلود رایگان
عنوان انگلیسی مقاله ISI
Length scaling of the Double Gate Tunnel FET with a high-K gate dielectric
موضوعات مرتبط
مهندسی و علوم پایه سایر رشته های مهندسی مهندسی برق و الکترونیک
پیش نمایش صفحه اول مقاله
Length scaling of the Double Gate Tunnel FET with a high-K gate dielectric
چکیده انگلیسی

In this paper, the length scaling of the silicon Double Gate Tunnel Field Effect Transistor (DG Tunnel FET) is studied. It is found that scaling limits are reached sooner by Tunnel FETs with an SiO2 gate dielectric, while those with a high-K dielectric can be scaled further before threshold voltage, and average and point subthreshold swing are affected. It is demonstrated that the scaling of the high-K Tunnel FET is completely different than that of conventional MOS transistors. An outstanding feature of the Tunnel FET switch is that length scaling has a much weaker impact on device characteristics than does gate control (e.g. the use of a high-K dielectric), which primarily dictates the tunneling barrier width and consequently, device conduction. This paper demonstrates that while some improvements are observed, the length scaling does not dramatically affect switch figures of merit such as subthreshold slope, Ion and Ioff down to about 20 nm, and an optimized device design can be extended over a much larger window of sub-micron dimensions, compared to the MOSFET. A discussion of the length dependence of the transconductance, gm, and output conductance, gds of the Tunnel FET is presented for the first time.

ناشر
Database: Elsevier - ScienceDirect (ساینس دایرکت)
Journal: Solid-State Electronics - Volume 51, Issues 11–12, November–December 2007, Pages 1500–1507
نویسندگان
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