Impact of graded channel (GC) design in fully depleted cylindrical/surrounding gate MOSFET (FD CGT/SGT) for improved short channel immunity and hot carrier reliability

In the present paper, a two-dimensional (2-D) analytical model for graded channel fully depleted cylindrical/surrounding gate MOSFET (GC FD CGT/SGT) has been developed by solving the Poisson’s equation in cylindrical coordinates. An abrupt transition of silicon film doping at the interface has been assumed and the effects of the doping and the lengths of the high and low doped regions have been taken into account. The model is used to obtain the expressions of surface potential and electric field in the two regions. The analysis is extended to obtain the expressions for threshold voltage (Vth) and subthreshold swing. It is shown that a graded doping profile in the channel leads to suppression of short channel effects (SCEs) like threshold voltage roll-off, drain induced barrier lowering (DIBL) and hot carrier effects. The results so obtained have been compared with simulated results obtained using the device simulator ATLAS 3D and are found to be in good agreement.