DC and low frequency noise characterization of FinFET devices

A detailed DC and LF noise characterization of FinFETs is carried out. Parameter extraction conducted at room and low temperature clearly indicates that the mobility is degraded at small gate length in sub 100 nm FinFETs, as was already found for GAA, FD-SOI and DG-MOS devices. By proper extraction technique, sidewall and top conductions are analyzed, showing that sidewall mobility is about 25–30% degraded as compared to the top surface conduction, likely resulting from Fin patterning-induced defects and/or crystal orientation difference. Trap density in high-k/metal gate stack is found much larger than in pure SiO2 MOSFETs but with no further degradation at small Fin widths.