کد مقاله | کد نشریه | سال انتشار | مقاله انگلیسی | نسخه تمام متن |
---|---|---|---|---|
9670516 | 1450403 | 2005 | 4 صفحه PDF | دانلود رایگان |
عنوان انگلیسی مقاله ISI
Low temperature crystallized Ta2O5/Nb2O5 bi-layers integrated into RIR capacitor for 60 nm generation and beyond
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کلمات کلیدی
موضوعات مرتبط
مهندسی و علوم پایه
مهندسی کامپیوتر
سخت افزارها و معماری
پیش نمایش صفحه اول مقاله
چکیده انگلیسی
Ta2O5/Nb2O5 bi-layers were prepared on Ru/SiO2/Si substrate by Atomic Layer Deposition, and post annealed up to 575 °C. The crystallization temperature of the bi-layers was 550 °C, which was 100 °C lower than that of Ta2O5 single layer. The thickness of the dielectric layers was also important parameter for the crystallization temperature. Transmittance Electron Microscopy image and depth profile analysis showed that Ta2O5 and Nb2O5 mixed each other during the crystallization. It was suggested that inter diffusion of two layers decreased the crystallization temperature of the bi-layers. Equivalent oxide thickness of crystalline Ru/Ta2O5/Nb2O5/Ru capacitor was 7.6 Ã
with less than 100Â nA/cm2 leakage currents, which satisfied the requirements for 60Â nm generation DRAM capacitor and beyond.
ناشر
Database: Elsevier - ScienceDirect (ساینس دایرکت)
Journal: Microelectronic Engineering - Volume 80, 17 June 2005, Pages 317-320
Journal: Microelectronic Engineering - Volume 80, 17 June 2005, Pages 317-320
نویسندگان
Kyuho Cho, Jinil Lee, Jae-Soon Lim, Hanjin Lim, Junghyun Lee, Sungho Park, Cha-Young Yoo, Sung-Tae Kim, U-In Chung, Joo-Tae Moon,