Design of RSFQ wave pipelined Kogge–Stone Adder and developing custom compound gates

• An 8 bit Kogge–Stone Adder circuit based on RSFQ logic is designed.
• Wave-pipelining is utilized to achieve 25 GHz clock frequency.
• Compound logic gate design approach is utilized to increase the operation margin and efficiency.
• Adder circuitry is proposed to be used later in an ALU.

Since the invention of computers, the calculation of arithmetic and logic operations using digital circuits has been one of the leading problems in processor designs. The challenge has been to compute more operations with less clock cycles by using additional specific logic circuits. One of the most fundamental processes is addition; in which the carry bit should be transferred from the least significant bit to the most significant one. A wide range of digital circuit designs have been sustained for specialized faster addition operation. One of these adder algorithms is Kogge Stone Adder which does faster calculation with fewer levels and minimum fan-out compared to today’s adders despite the only disadvantage of having an excessive amount of wiring.In this study, a custom Rapid Single Flux Quantum (RSFQ) based, wave pipelined, Kogge Stone Adder is proposed to be used later in an Arithmetic Logic Unit (ALU). Two different design methodologies have been considered. In the first approach, we used standard logic gates for the whole adder design. In the second approach, utilization to compound gate design with adjustments over component parameters is done by using Particle Swarm Optimization and Statistical Timing Analysis Tools, to increase both efficiency and bias margin.