Design of a novel high performance Schottky barrier based compact transmission gate

In this work, we propose and simulate a novel single transistor based transmission gate. The proposed device is a double gate Schottky device employing a stack of platinum silicide and erbium silicide materials to realize metal source and drain regions. The novelty of the proposed device lies in its ability to realize both n and p type modes simultaneously, which is normally being realized by a parallel combination of NMOS and PMOS transistors in a conventional transmission gate. The proposed device is compact, has reduced number of regions, junctions and interconnects in comparison to the conventional transmission gate. A two dimensional (2D) calibrated simulation study has shown a reduction of 10.42% in average delay and 18.7% in the total power dissipation in the proposed transmission gate in comparison to the conventional Schottky barrier MOSFETs based transmission gate. Furthermore, it has been observed that such a transmission gate action cannot be realised by folding the conventional NMOS and PMOS transistors.