کد مقاله | کد نشریه | سال انتشار | مقاله انگلیسی | نسخه تمام متن |
---|---|---|---|---|
1552808 | 1513221 | 2015 | 12 صفحه PDF | دانلود رایگان |
• Rigorous quantum mechanical analysis of gate tunneling current. Fully analytical model with no fitting parameter.
• Reduction of tunnel current by several orders of magnitude due to use of high-k dielectric over layer.
• Optimal design with almost no change in threshold condition. Effect of hetero-interface on band profiling of Si substrate.
• Use of modified Ben-Daniel Duke boundary condition. Calculation of probability density of tunneling electron.
• Use of WKB approximation to determine tunneling probability. Consideration of both direct and Fowler-Nordheim tunneling.
A compact model for gate tunneling current in advanced nano-scale MOSFET has been developed on the basis of both direct and Fowler–Nordheim tunneling through dual layer Silicon oxide–Hafnium oxide stack used as gate dielectric. Calculation includes the effect of different subbands of the semiconductor conduction band those arise due to quantum confinement of charge carriers in the oxide–substrate interface. Effect of charge trapping in the bulk of the oxides and at the localized energy levels at different interfaces of the oxides has also been taken into consideration. Tunneling probability as a function of gate bias has been determined considering Wentzel–Kramers–Brillouin (WKB) approximation to account for varying potential profile. Probability amplitude of an electron for tunneling has been calculated by solving Schrodinger equations at different regions in the effective mass approximation model of class I crystal interface. Tunneling current as a function of effective oxide thickness and gate bias estimated in this model shows substantial reduction in gate leakage current if HfO2 as high-k dielectric is used along with 1 nm thick SiO2 with almost negligible change in threshold voltage.
Journal: Superlattices and Microstructures - Volume 80, April 2015, Pages 20–31