Design of a 1200-V ultra-thin partial SOI LDMOS with n-type buried layer

• A 1200-V ultra-thin NBL PSOI LDMOS is proposed.
• A ULVD profile is adopted in the n-drift region of the NBL PSOI LDMOS.
• The NBL PSOI LDMOS can improve SHE obviously.
• The optimized NBL PSOI LDMOS achieves a high BV of 1243 V and a low Tmax of 333 K.
• Ron,sp and Tmax of the proposed LDMOS for a wide range of BV is also optimized.

A novel 1200-V ultra-thin partial silicon-on-insulator (PSOI) lateral double-diffusion metal oxide semiconductor (LDMOS) with n-type buried (n-buried) layer (NBL PSOI LDMOS) is proposed in this paper. The new PSOI LDMOS features an n-buried layer underneath the n-type drift (n-drift) region close to the source side, providing a large conduction region for majority carriers and a silicon window to improve self-heating effect (SHE). A combination of uniform and linear variable doping (ULVD) profile is utilized in the n-drift region, which alleviates the inherent tradeoff between specific on-resistance (Ron,sp) and breakdown voltage (BV). With the n-drift region length of 80 μm, the NBL PSOI LDMOS obtains a high BV of 1243 V which is improved by around 105 V in comparison to the conventional SOI LDMOS with linear variable doping (LVD) profile for the n-drift region (LVD SOI LDMOS). Besides, the 1200-V NBL PSOI LDMOS has a lower maximum temperature (Tmax) of 333 K at a power (P) of 1 mW/μm which is reduced by around 61 K. Meanwhile, Ron,sp and Tmax of the NBL PSOI LDMOS are lower than those of the conventional LVD SOI LDMOS for a wide range of BV.