A novel high frequency SOI MESFET by modified gate capacitances

• A SOI MESFET with high frequency performance is presented.
• The key idea is to control gate capacitances by modifying channel charges.
• The structure improves the G-S and G-D capacitances and the Fmin and decreases them.
• It causes the generation rate decreases near the source and drain side in channel.
• The structure has superior performances in comparison with conventional structures.

A novel SOI MESFET with high frequency performance over conventional structures is presented. The key idea in this work is to control gate capacitances by modifying channel charges. The proposed structure consists of an additional oxide layer in the channel under gate to control the channel charges. We investigate the improvement in device performance with two-dimensional and two-carrier device simulation. The proposed structure improves the gate-source and gate-drain capacitances and the minimum noise figure in comparison with a conventional SOI MESFET (C-SOI). Moreover, it has been decreased the carriers concentrations especially holes around drain. Hence it causes the generation rate decreases by 137% near the source side with a minimum value around the oxide and therefore the break down voltage will increase. The results demonstrate that the proposed structure has better frequency characteristics in comparison with the C-SOI structure.