کد مقاله کد نشریه سال انتشار مقاله انگلیسی نسخه تمام متن
539425 1450387 2012 6 صفحه PDF دانلود رایگان
عنوان انگلیسی مقاله ISI
Specific features of silicon surface region fluorination by RIE in r.f. CF4 plasma – A novel method for improving the electrical properties of thin PECVD silicon oxide films
موضوعات مرتبط
مهندسی و علوم پایه مهندسی کامپیوتر سخت افزارها و معماری
پیش نمایش صفحه اول مقاله
Specific features of silicon surface region fluorination by RIE in r.f. CF4 plasma – A novel method for improving the electrical properties of thin PECVD silicon oxide films
چکیده انگلیسی

In this study, we compare a previously reported method of improving the electro-physical properties of silicon dioxide (SiO2), which uses silicon substrate fluorination in CF4 in a Plasma Enhanced Chemical Vapor Deposition (PECVD) reactor prior to oxide deposition, with our proposed method of fluorination in CF4 in a classical Reactive Ion Etching (RIE) reactor.The careful analysis of the location and behavior of fluorine profile during PECVD gate oxide deposition was done by means of Ultra Low Energy-Secondary Ion Mass Spectroscopy (ULE-SIMS). The observed effects were used to determine changes in the electrical properties of the dielectric layers from the two fluorination methods being studied.The results showed that, in general, fluorination in a RIE reactor is superior to fluorination in a PECVD reactor. The advantage of the former technique is that most of the electro-physical properties of the resulting Metal–Oxide-Semiconductor (MOS) structures are significantly better. The change in the properties of gate stacks was shown to be fluorine concentration dependent, which can be controlled by the parameters of the RIE (e.g., by r.f. power supplied to the discharge). However, this study concluded that the fluorine profile parameters cannot be controlled independently.

Figure optionsDownload as PowerPoint slideHighlights
► Comparison of fluorine plasma implantation methods have been performed.
► Classical PECVD and RIE reactors were used for ultra-shallow implantation.
► Observed changes were determined by ULE-SIMS and electrical (C–V and I–V) methods.
► PECVD SiO2 was used as gate dielectric layer in MOS structures.
► Fluorination in RIE results in better electrical behavior of MOS structures.

ناشر
Database: Elsevier - ScienceDirect (ساینس دایرکت)
Journal: Microelectronic Engineering - Volume 94, June 2012, Pages 1–6
نویسندگان
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