Microstructure in copper interconnects – Influence of plating additive concentration

Downscaling of copper interconnects is demanding more knowledge about the microstructure and grain growth mechanisms in sub 100 nm dimensions. Large grains are needed to reduce the resistivity and to increase the reliability of narrow lines. Plating additives are used for a void free filling of the interconnecting vias and lines. Fractions of these additives are incorporated into the copper as impurities during electrochemical deposition. In the present paper the role of additive concentration on grain growth is investigated. Interconnect lines from 72 nm to 1.9 μm line width were completely filled with copper using different additive concentrations in the electrolyte. The impurity level was measured by time of flight secondary ion mass spectrometry. The samples were stored at room-temperature to achieve self-annealing or tempered at low and high temperatures. Self-annealing slows down with increasing additive concentration whereas bamboo-like grains are present after annealing all samples at high temperatures. Grain growth was studied as well as the average grain size, resistivity, and {1 1 1} texture.