Effect of high temperature annealing on tunnel oxide properties in TANOS devices

We investigate the effect of high temperature Post-Deposition Annealing of Al2O3 on the tunnel oxide of TANOS-like non-volatile memories. We found that, when temperature steps above 850 °C are applied after the stack deposition, a transition layer is forming by the intermixing of the Si3N4 with the upper part of the underneath SiO2. We found that this transition layer has worse dielectric properties as compared to SiO2, altering in a not-negligible way the performance of TANOS memories, and in particular severely penalizing retention.

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►  High temperature PDA required in TANOS memories.
► PDA induces unwanted intermixing between SiO2 and Si3N4.
► Intermixed layer has worse insulation capabilities.
► Intermixed layer alters device performance, penalizing retention.