کد مقاله | کد نشریه | سال انتشار | مقاله انگلیسی | نسخه تمام متن |
---|---|---|---|---|
541315 | 1450361 | 2014 | 7 صفحه PDF | دانلود رایگان |

• EM & SM compact modeling requires knowledge of degradation kinetics.
• Across-die distribution of residual stress is required for accurate SM & EM assessments.
• Methodology for simulating across-die distribution of residual stress is proposed.
• Analytical formulation for the void nucleation time is derived.
Simulation flow for the die-scale assessment of interconnect stress-migration (SM) and electromigration (EM) with an accounted variation of residual stress was developed. Two complimentary methodologies based on finite-element sub-modeling and compact modeling were proposed. A novel EM and SM model which takes into account a vacancy exchange between grain boundaries and grain interior has demonstrated a capability of predicting times for void nucleation at different test conditions while avoiding unreliable assumptions used in the Black’s equation-based assessment.
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Journal: Microelectronic Engineering - Volume 120, 25 May 2014, Pages 99–105