Nanostructuring of silicon substrates for the site-controlled growth of GaAs/In0.15Ga0.85As/GaAs nanostructures

We report the optimization of electron beam lithography and inductively coupled plasma (ICP) dry etching processes to fabricate pre-patterned Si (100) substrates with sub-100 nm holes with controlled size and shape. An efficient in situ cleaning sequence based on atomic hydrogen cleaning at 500 °C combined with thermal oxide desorption at 750 °C confirmed by reflection high energy electron diffraction (RHEED) pattern of two dimensional clean surface prior to the MBE growth has been established. The MBE growth of GaAs/In0.15Ga0.85As/GaAs system on patterned Si surface has shown highly selective formation of localized dome like nanostructures in patterned holes with 1 μm period.

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► Silicon substrates patterned with sub-100 nm holes.
► Nanoholes pattern defined on resist by optimized electron beam exposure parameters.
► Pattern transfer to silicon by optimized SF6/CHF3 ICP dry etching process.
► Site-controlled growth of GaAs/InGaAs/GaAs nanostructure in holes with 1 μm period.