Interplay of plasma etch, strip and wet clean in patterning La2O3/HfO2-containing high-κ/metal gate stacks

The removal process of the La2O3/HfO2 dielectric and of the residues after metal gate etch are discussed. The challenges are presented and related to the specific physico-chemical properties of La-containing compounds. Solutions based on optimization of plasma etch, strip and wet clean are demonstrated for both an integrated and delayed etch–clean process. Both processes meet the stringent requirements of complete removal of the high-κ layers and metal-containing sidewall residues without inducing silicon recess or undercut.