کد مقاله کد نشریه سال انتشار مقاله انگلیسی نسخه تمام متن
6874667 1441187 2018 13 صفحه PDF دانلود رایگان
عنوان انگلیسی مقاله ISI
On the limits of gate elimination
ترجمه فارسی عنوان
در محدوده دروازه حذف
کلمات کلیدی
پیچیدگی مدار، مرزهای پایین، از بین بردن دروازه،
موضوعات مرتبط
مهندسی و علوم پایه مهندسی کامپیوتر نظریه محاسباتی و ریاضیات
چکیده انگلیسی
Although a simple counting argument shows the existence of Boolean functions of exponential circuit complexity, proving superlinear circuit lower bounds for explicit functions seems to be out of reach of the current techniques. There has been a (very slow) progress in proving linear lower bounds with the latest record of 3186n−o(n). All known lower bounds are based on the so-called gate elimination technique. A typical gate elimination argument shows that it is possible to eliminate several gates from a circuit by making one or several substitutions to the input variables and repeats this inductively. In this paper we prove that this method cannot achieve linear bounds of cn beyond a certain constant c, where c depends only on the number of substitutions made at a single step of the induction.
ناشر
Database: Elsevier - ScienceDirect (ساینس دایرکت)
Journal: Journal of Computer and System Sciences - Volume 96, September 2018, Pages 107-119
نویسندگان
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