Temperature dependent electrical properties of Cd/CdS/n-Si/Au-Sb structures

The temperature dependent electrical properties of Cd/CdS/n-Si/Au–Sb structure were investigated using current–voltage (I–V), capacitance–voltage (C–V) and conductance–voltage (G/w–V) characteristics in the temperature range of 80–300 K. The main electrical parameters, such as ideality factor (n) and zero-bias barrier height (Φb0) determined from the forward bias I–V characteristics were found strongly dependent on temperature and when the Φb0 increased, the n decreased with increasing temperature. This behaviors are attributed to the assumption of a Gaussian distribution of barrier heights and barrier inhomogenities that dominance at the metal–semiconductor interface. The C–V plots give a peak especially at high temperatures in the depletion region and when the temperature was increased both the values of C and G/w   decreased. These behaviors are mainly attributed to the molecular restructuring and reordering of the interface states and series resistance. The value of series resistance (Rs)(Rs) and the interface state density distribution (Nss)(Nss) were determined from the C–V and G/w–V   characteristics The change in RsRs with temperature may be explained by the lack of free charge carriers. Also, the barrier height and carrier concentration were calculated from reverse bias C−2–V characteristics at 500 kHz frequency with increasing temperature.