High speed Bias Temperature Instability measurements on 20 nm RMG HKMG MOSFETs

• Measurement of BTI degradation for 20 nm MOSFETs performed with 1 μs sense delay.
• Setup consists of B1530 WGFMU in coordination with Cascade Microtech S300 tester.
• Capability of the setup tested by sampling drain current with 10 ns time resolution.
• 1 μs delay is necessary to capture the fast recovering component of the degradation.
• However, 2 ms sense delay is still adequate for EOL projection.

Negative Bias Temperature Instability (NBTI) occurs in p-channel MOSFETs when they are operated at high temperature and negative bias on the gate. NBTI phenomena exhibits recovery once the stress is removed from the device. It is mainly due to de-trapping of holes from the oxide and partial recovery of generated interface traps. This causes an underestimation of the actual degradation in VT during typical stress-measure-stress cycle. In this work threshold voltage (VT) degradation was measured with a minimum sense delay of 1 μs, on p-channel MOSFETs fabricated using the sub-20 nm RMG HKMG technology. Based on this work, it is shown that using 1 μs delay the existence of a fast recoverable component of BTI can be shown very effectively. The impact on end-of-life (EOL) projection is a function of the voltage acceleration/time exponent for the two different components and we confirmed that the 2 ms delay is still adequate for that purpose.