Effect of In addition and annealing temperature on the device performance of solution-processed In–Zn–Sn–O thin film transistors

• InZnSnO thin film transistors were fabricated by a sol–gel process.
• The saturation mobility of 1.9 cm2/V s was obtained.
• Annealing brought about phase transformation from amorphous to nanocrystalline.

We fabricated solution-processed thin film transistors (TFTs) with an In–Zn–Sn–O (IZTO) channel layer and investigated the effect of In addition on the device performance of IZTO TFTs. Also, in order to examine the dependence of electrical characteristics on microstructural evolution of a channel layer, annealing temperatures were varied from 400 to 600 °C. With an increase of In content in IZTO films, the off-current was increased and threshold voltage was shifted to the negative direction. This was due to the increase of carrier concentration caused by In addition. For the samples annealed below 500 °C, amorphous phases were obtained. In contrast, for the sample annealed at 600 °C, nanocrystalline films were obtained. With increasing annealing temperature, on/off current ratio and saturation mobility were increased because the quality of IZTO films was improved by phase transformation from amorphous to nanocrystalline phase.