Revisited approach for the characterization of Gate Induced Drain Leakage

This work presents a critical review and a re-investigation of the electrical characterization of Gate Induced Drain Leakage (GIDL) [1] and [2]. The underlying assumptions of the previously proposed extraction methods are exposed and their ability to capture Band-to-Trap mechanisms is discussed. A new approach is introduced to overcome some of the limiting assumptions made by the previous extraction methods. This new approach is benchmarked against the previously proposed ones. The results show that it enables a better extraction of the GIDL parameters compared to the conventional methods, by using the voltage dependency of the activation energy to gain insight in the electric field responsible for Band-to-Band Tunneling in the device. Finally, the experimental application of this new approach is carried out on cold process FDSOI MOSFET and confirms the ability of this new method to quantify the impact of trap assisted tunneling on GIDL.

► The electrical characterization of Gate Induced Drain is addressed in this study.
► The proposed new method enables a better extraction of the GIDL parameters.
► The application confirms that Solid Phase Epitaxial Regrowth lead to stronger defect formation.