کد مقاله | کد نشریه | سال انتشار | مقاله انگلیسی | نسخه تمام متن |
---|---|---|---|---|
7938647 | 1513184 | 2018 | 8 صفحه PDF | دانلود رایگان |
عنوان انگلیسی مقاله ISI
Design of double gate vertical tunnel field effect transistor using HDB and its performance estimation
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موضوعات مرتبط
مهندسی و علوم پایه
مهندسی مواد
مواد الکترونیکی، نوری و مغناطیسی
پیش نمایش صفحه اول مقاله
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چکیده انگلیسی
In this paper, we demonstrate the double gate vertical tunnel field-effect transistor using homo/hetero dielectric buried oxide (HDB) to obtain the optimized device characteristics. In this concern, the existence of double gate, HDB and electrode work-function engineering enhances DC performance and Analog/RF performance. The use of electrostatic doping helps to achieve higher on-current owing to occurrence of higher tunneling generation rate of charge carriers at the source/epitaxial interface. Further, lightly doped drain region and high-k dielectric below channel and drain region are responsible to suppress the ambipolar current. Simulated results clarifies that proposed device have achieved the tremendous performance in terms of driving current capability, steeper subthreshold slope (SS), drain induced barrier lowering (DIBL), hot carrier effects (HCEs) and high frequency parameters for better device reliability.
ناشر
Database: Elsevier - ScienceDirect (ساینس دایرکت)
Journal: Superlattices and Microstructures - Volume 117, May 2018, Pages 1-8
Journal: Superlattices and Microstructures - Volume 117, May 2018, Pages 1-8
نویسندگان
Seema Seema, Sudakar Singh Chauhan,