Impact of interface layer and metal workfunction on device performance of ferroelectric junctionless cylindrical surrounding gate transistors

In this work, the negative capacitance phenomenon exhibited by ferroelectric materials has been incorporated in Junctionless Cylindrical Surrounding Gate (JLCSG) transistor and an analytical model has been developed to study the electrical characteristics of the device by taking into account Landau Khalatnikov equation along with parabolic potential approximation. Using the derived model various electrical parameters such as potential, gain, drain current, gate capacitance etc have been obtained. Silicon doped hafnium oxide has been incorporated as the ferroelectric material and exhaustive study has been done to study the impact of interfacial layer and metal workfunction on device characteristics as these have significant impact on the performance of Junctionless devices. It has been demonstrated by analytical model and TCAD simulations that by incorporating ferroelectric layer and optimizing metal work function and interfacial layer thickness, the device performance of JLCSG can be substantially improved.