New salicidation technology PtSi for strained SiGe device

To optimize the strained SiGe CMOS process, low temperature salicidate technology is required. In this paper, Pt and Ni have been salicidated at different temperatures and compared. We notice that PtSi yields a lower sheet resistance in general. Furnace and rapid thermal annealing (RTA) have been employed for the salicidation. No big difference for PtSi salicidation occurs for two approaches, RTA is preferable for NiSi salicidation to obtain a lower sheet resistance. The effects of BF2+ implantation before salicide junction formed and implantation energy on sheet resistance and contact resistance have been studied. BF2+ implantation has no significant effect on PtSi sheet resistance, but it reduces contact resistance dramatically when an implantation energy of 25 keV is used with a dose of 5E15 cm−3. A study of the second thermal step effect on salicidation shows that PtSi has a better thermal stability than NiSi.