Growth of Si/III–V-N/Si structure with two-chamber molecular beam epitaxy system for optoelectronic integrated circuits

A Si/III–V-N/Si structure for optoelectronic integrated circuits (OEICs) was grown using a two-chamber molecular beam epitaxy (MBE) system to decrease a carrier concentration of Si epilayer for metal oxide field effect transistors (MOSFETs). At first, a GaP layer was grown by migration-enhanced epitaxy on a Si substrate. Two-dimensional growth mode was maintained, and self-annihilation of anti-phase domain was confirmed. The growth process was also identified from reflection high-energy electron diffraction patterns during the growth. Subsequently, an InGaPN/GaPN double-hetero light-emitting diode (LED) and a topmost Si layer were grown by the dislocation-free growth process. It was found that a carrier concentration of the topmost Si epilayer was decreased to 4.0–6.6×1017 cm−3 from 3.0–6.7×1018 cm−3 by using the two-chamber MBE system instead of a single-chamber MBE system. The carrier concentration could be adapted to the fabrication of MOSFETs. Finally, we have fabricated elemental devices on the Si/III–V-N/Si structure and obtained characteristics of pMOSFETs and LEDs successfully. It was confirmed that the two-chamber MBE system could be available to the realization of OEICs.