Effects of HfO2/SiON/SiN stacked trapping layer on operation characteristics of poly-Si flash memory devices

• Effects of HfO2/SiON/SiN (HON) trapping layer on poly-Si flash devices are studied.
• The HON layer is formed by a RTO process between the depositions of SiN and HfO2.
• Retention characteristics of poly-Si flash memory devices are improved by a HON.
• The better retention can be attributed to higher Ec and lower trap density of SiON.

A HfO2/SiON/SiN (HON) bandgap-engineered trapping layer (BETL) on inversion-mode (IM) and junctionless (JL) polycrystalline-Si flash memory devices is investigated in this work. The HON layer is formed by performing a rapid thermal oxidation process between the depositions of SiN and HfO2. For IM device, the programming speed, retention and endurance characteristics are improved by the HON BETL while without degrading its erasing speed when compared to that with HfO2/SiN (HN) BETL. As to the JL device, improved erasing speed and retention characteristics are obtained with HON BETL; high programming speed and good endurance performances of the JL device are also observed. HON BETL is promising to improve retention characteristics of poly-Si flash memory devices since the conduction band level of SiON is higher and the trap density of SiON is lower as compared to those of SiN.

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