Measurement-based electrical characterization of through silicon vias and transmission lines for 3D integration

• Measure TSVs and metal lines at DC and high frequency up to 40 GHz
• Apply two methods to extract resistance and inductance of single TSV
• Separate individual transmission loss of TSV and metal line from test structures
• Extract circuit parameters of TSV and metal lines up to 40 GHz

Measurement-based electrical characterization of through silicon via (TSV) and redistribution layer (RDL) is of great importance for both fabrication process and system design of 3D integration. This paper presents the electrical measurements and analysis of TSV and double-sided RDL test structures, from DC to high frequency up to 40 GHz. TSV shows great dependence of DC resistance and leakage current on fabrication process. An inverse V-shaped C–V curve is presented between adjacent TSVs in N-type silicon substrate, from − 10 V to 10 V. In the high frequency characterization, two methods are proposed and applied to extract resistance and inductance of a single grounded TSV. Individual transmission loss of TSV, RDLs on top and bottom surface of silicon substrate are calculated, and corresponding circuit parameters thereof are extracted to characterize their electrical properties precisely.

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