On MOS admittance modeling to study border trap capture/emission and its effect on electrical behavior of high-k/III-V MOS devices

On MOS admittance modeling to study border trap capture/emission and its effect on electrical behavior of high-k/III-V MOS devices

Database: Elsevier - ScienceDirect (ساینس دایرکت)
Journal: Microelectronic Engineering - Volume 147, 1 November 2015, Pages 227-230

Abhitosh Vais, Koen Martens, Dennis Lin, Nadine Collaert, Anda Mocuta, Kristin DeMeyer, Aaron Thean,