Time delay analysis in high speed gate-recessed E-mode InAlN HEMTs

Delay analysis providing an alternative physical explanation on carrier transport, which may be more applicable to high electron mobility transistor (HEMT) channels with moderate carrier mobilities, has been applied to enhancement-mode (E-mode) and depletion-mode (D-mode) InAlN/AlN/GaN HEMTs with comparable fT at room and cryogenic temperatures. It was found that the speed of the E-mode HEMTs with 33-nm long T-gate is dominated by parasitic delays, >40% of the total delay; channel mobility might have degraded due to gate recess.

► We apply a modified delay analysis method for HEMTs.
► It may be more applicable to HEMT channels with moderate carrier mobilities.
► It allows for understanding carrier transport directly from the HEMT characteristics.
► A 33-nm gate-recessed E-mode InAlN/AlN/GaN HEMTs is analyzed.