Si and Ge step-FinFETs: Work function variability, optimization and electrical parameters

We present two different step-FinFETs under the consideration that fin material is made of either Si or Ge, named as Si step-FinFET and Ge step-FinFET. A comparative simulation study among conventional FinFET (C-FinFET), and proposed step-FinFETs is presented. It is observed that Ge step-FinFET offers better Ion/Ioff ratio, with a lower intrinsic delay. Parametric analysis shows that Si step-FinFET is more resistant to subthreshold swing (SS), drain induced barrier lowering (DIBL), threshold voltage (VT) roll off and Ge step-FinFET has higher Ion/Ioff ratio, lower intrinsic delay at various channel length and oxide thickness. In presence of gate metal work function variations (WFV), a comparison of electrical parameters between C-FinFET, Si step-FinFET, and Ge step-FinFET has also been studied. We found that Si step-FinFET gives lesser variation in threshold voltage (σVT), lesser variation in subthreshold swing (σSS), and higher variation in current ratio (σ(Ion/Ioff)) than C-FinFET. σVT, σSS, and σ(Ion/Ioff) are compared for Ge step-FinFET and Si step-FinFET.