Trapping properties of sputtered hafnium oxide films: Bulk traps vs. interface traps

The purpose of this work is to investigate the influence of the spatial distribution of traps on the electrical characteristics of hafnium oxide films deposited by physical vapor deposition. Samples were Al gated metal-oxide-semiconductor capacitors with hafnium oxide films deposited on SiO2 layer thermally grown on Si. During capacitance–voltage measurements large hysteresis, up to 10 V, are observed in all samples. It is shown that depending on the hafnium oxide deposition conditions, the spatial distribution of the traps responsible for the hysteresis can be either two dimensional (interface/border traps) or three dimensional (bulk traps).