High performance top-gated indium–zinc–oxide thin film transistors with in-situ formed HfO2 gate insulator

• High-performance indium–zinc–oxide (IZO) thin film transistors (TFTs).
• Single-step in-situ dielectric formation approach simplifies fabrication process.
• During anneal, reaction between HfOx and IZO channel forms a high quality HfO2 layer.
• Gate insulator HfO2 shows low interface trapped charge and small gate leakage.
• TFTs have high mobility, near-zero threshold voltage, and a low subthreshold swing.

We report on top-gated indium–zinc–oxide (IZO) thin film transistors (TFTs) with an in-situ formed HfO2 gate dielectric insulator. Building on our previous demonstration of high-performance IZO TFTs with Al2O3/HfO2 gate dielectric, we now report on a one-step process, in which Hf is evaporated onto the 20 nm thick IZO channel, forming a partially oxidized HfOx layer, without any additional insulator in-between. After annealing in air at 300 °C, the in-situ reaction between partially oxidized Hf and IZO forms a high quality HfO2 gate insulator with a low interface trapped charge density NTC ~ 2.3 × 1011 cm− 2 and acceptably low gate leakage < 3 × 10− 7 A/cm2 at gate voltage VG = 1 V. The annealed TFTs with gate length LG = 50 μm have high mobility ~ 95 cm2/V ∙ s (determined via the Y-function technique), high on/off ratio ~ 107, near-zero threshold voltage VT = − 0.02 V, and a subthreshold swing of 0.062 V/decade, near the theoretical limit. The on-current of our proof-of-concept TFTs is relatively low, but can be improved by reducing LG, indicating that high-performance top-gated HfO2-isolated IZO TFTs can be fabricated using a single-step in-situ dielectric formation approach.