Electronic and structural properties of the amorphous/crystalline silicon interface

A review of capacitance and conductance measurements on (n) a-Si:H/(p) c-Si structures is presented. Capacitance measurements performed on cells under AM 1.5 illumination at or close to open-circuit voltage are sensitive to the recombination at interfaces, as evidenced by the comparison with photoluminescence results. Capacitance measurements performed in the dark at zero or reverse bias can reveal the presence of interface defects from trapping and release of carriers, but the sensitivity is limited to a few 1012 cm− 2 eV− 1. This is partly due to the presence of a strong inversion layer at the c-Si surface. Such a layer has been revealed from coplanar conductance measurements, which allow a precise determination of the conduction band offset, found equal to 0.15 (± 0.04) eV. As shown by spectroscopic ellipsometry, a thin undoped silicon layer deposited under conditions that normally produce polymorphous silicon can be epitaxially grown onto c-Si prior to the (n) a-Si:H layer. Electrical measurements indicate that this additional buffer layer is not detrimental and can slightly improve the interface quality.