Temperature and annealing effects on InAs nanowire MOSFETs

We report on temperature dependence on the drive current as well as long-term effects of annealing in vertical InAs nanowire Field-Effect Transistors. Negatively charged traps in the HfO2 gate dielectric are suggested as one major factor in explaining the effects observed in the transistor characteristics. An energy barrier may be correlated with an un-gated InAs nanowire region covered with HfO2 and the effects of annealing may be explained by changed charging on defects in the oxide. Initial simulations confirm the general effects on the I–V characteristics by including fixed charge.

Long-term annealing effects and temperature dependence on vertical InAs nanowire MOSFETs are presented. A model with charge traps in the gate dielectric, also covering the un-gated segment between source and gate, is used for explaining the transistor characteristics.Figure optionsDownload as PowerPoint slideHighlights
► We study vertical InAs nanowire MOSFETs with HfO2 gate dielectric.
► An energy barrier dominates the temperature dependence.
► Annealing increase the drive current of the transistors.
► After annealing the current returns to the original value very slowly.
► A model with charge traps in the HfO2 is used to explain the transistor behavior.