Development of analytical model for strained silicon relaxation on (100) fully relaxed Si0.8Ge0.2 pseudo-substrates

Early stages of strained silicon (sSi) relaxation during the growth on (100) Si0.8Ge0.2 pseudo-substrates with low threading dislocation density (3 · 10+ 4/cm²) have been studied. Threading dislocations are only observed in sSi layers at early stages of growth whereas Shockley partial dislocations appear at thicknesses of sSi above 18 nm. By analyzing the dislocation types in different sSi layers we observed three different regimes of relaxation:–for sSi thickness below 15 nm, no dislocation generation is observed,–for sSi thickness between 15 nm and 18 nm, threading dislocation density increases but no stacking faults are generated,–for sSi thickness above 18 nm, threading dislocation density decreases as well as Shockley partial dislocation density increases due to the splitting of threading dislocations into partial dislocations. In this regime the stacking fault linear density has a logarithmic dependence with sSi thickness.We developed an analytical model to describe stacking fault linear density evolution with sSi thickness and we showed that 18 nm threshold thickness for dislocation splitting corresponds to an intrinsic stacking fault energy of 90 mJ/m² in sSi.