Fabrication of n-type Schottky barrier thin-film transistor with channel length and width of 0.1 μm and erbium silicide source/drain

In this paper, a Schottky barrier polycrystalline silicon thin-film transistor (SB TFT) with erbium silicide source/drain is demonstrated using low temperature processes. A low temperature oxide is used for a gate dielectric and the transistor channel is crystallized by a metal-induced lateral crystallization process. An n-type SB TFT shows a normal electrical performance with subthreshold slope of 239 mV/dec, ION/IOFF ratio of 5.8 × 104 and ION of 2 μA/µm at VG = 3 V, VD = 2.5 V for 0.1 μm device. A process temperature is maintained at less than 600 °C throughout the whole processes. The SB TFT is expected to be a promising candidate for a next system-on-glass technology and an alternative 3D integration technology.