Study of gate leakage current in symmetric double gate MOSFETs with high-κ/stacked dielectrics

Quantum confinement in the ultra-thin silicon film of Double gate SOI MOSFETs affects the gate current (IG). In this work, a systematic study on IG in such devices for various high-κ/stacked gate dielectric material combinations with Equivalent Oxide thickness in the range of 1 to 2 nm has been carried out using a simulator developed for this purpose. The lower IG in DG devices compared to bulk devices is attributed to reduced vertical electric field and quantum confinement effects. The amount of improvement is affected by the body thickness and the thickness of the gate dielectric. With higher value of κ, the reduction in IG is even more pronounced. The gate dielectric can thus be more aggressively scaled with DG MOSFETs than with bulk-MOSFETs. It is found from our studies that Al2O3 is a better interfacial layer than SiO2 and La2O3 is the most promising dielectric material to sustain scaling for the next decade.