کد مقاله | کد نشریه | سال انتشار | مقاله انگلیسی | نسخه تمام متن |
---|---|---|---|---|
1793126 | 1023666 | 2010 | 10 صفحه PDF | دانلود رایگان |
Using a low temperature/high temperature strategy, we have grown thin (0.27 μm) and thick (2.45 μm) Ge layers on Si(0 0 1) substrates that we have submitted to various constant temperature (750 °C) or cyclic (750 °C/890 °C) H2 anneals, the objective being to identify those yielding the smoothest surfaces, the lowest threading dislocations densities (TDDs) and the highest near infra-red optical absorptions. The best trade-off for thin layers was 750 °C, 60 min H2 anneals. Using longer duration 750 °C anneals and especially 750 °C/890 °C cyclic anneals indeed yielded rougher surfaces and vastly degraded optical absorption (deleterious formation of GeSi alloys). By contrast, short 750 °C/890 °C thermal cyclings yielded the best metrics in thick Ge layers (while being at the same time the best in terms of throughput): root mean square surface roughness around 0.8 nm, TDD around 107 cm−2, slightly tensily-strained layers (which a plus for optical absorption as the absorption edge is shifted to higher wavelengths), a limited penetration of Si into Ge (and thus absorption coefficients at 1.3 and 1.55 μm almost equal to those of as-grown layers), etc. We have also described the low temperature (450 °C/525 °C) process that we have developed to passivate Ge surfaces thanks to SiH4 prior to gate stack deposition. Si layer thickness should be below 20 Å in order to have conformal deposition. A transition of the growth front to 3 dimensions has indeed been evidenced for 20 Å and higher.
Journal: Journal of Crystal Growth - Volume 312, Issue 4, 1 February 2010, Pages 532–541