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Daneshyari Hardware and Architecture Journas Latest Articles

Hardware and Architecture Research Articles

La-based ternary rare-earth oxides as alternative high-κ dielectrics
Fulltext Access 4 Pages 2007
Oxygen vacancies in high-k oxides
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Fabrication and characterization of M-I-FIS ferroelectric-gate structures using HfAlOx buffer layer
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Performance and reliability of ultra-thin oxide nMOSFETs under variable body bias
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Charge pumping spectroscopy: HfSiON defect study after substrate hot electron injection
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Oxygen vacancy induced charge trapping and positive bias temperature instability in HfO2nMOSFET
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A consistent model for the hard breakdown distribution including digital soft breakdown: the noble art of area scaling
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HCI degradation model based on the diffusion equation including the MVHR model
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A physics-based deconstruction of the percolation model of oxide breakdown
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Dielectric quality and reliability of FUSI/HfSiON devices with process induced strain
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Electrical and material property enhancement in HfTaSiON-gated MOS devices by tuning Hf composition
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Improvements of ozone surface treatment on the electrical characteristics and reliability in HfO2 gate stacks
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Thermal-stability improvement of LaON thin film formed using nitrogen radicals
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Protons at the Si-SiO2 interface: a first principle investigation
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Understanding of the thermal stability of the hafnium oxide/TiN stack via 2 “high k” and 2 metal deposition techniques
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Reduction of the anomalous VT behavior in MOSFETs with high-κ/metal gate stacks
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Mobility extraction using RFCV for 80 nm MOSFET with 1 nm EOT HfSiON/TiN
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The influence of HfO2 film thickness on the interface state density and low field mobility of n channel HfO2/TiN gate MOSFETs
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Performance enhancement of Poly-Si/TiN/SiON based pMOSFETs by addition of an aluminum oxide (AlO) capping layer
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0.6nm-EOT high-k gate stacks with HfSiOx interfacial layer grown by solid-phase reaction between HfO2 and Si substrate
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Modulation of the effective work function of fully-silicided (FUSI) gate stacks
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Recent advances and current challenges in the search for high mobility band-edge high-k/metal gate stacks
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A mask-free method of patterned porous silicon formation by a localized electrical field
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Effects of background doping concentration on electrostatic discharge protection of high voltage operating extended drain N-type MOS device
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Plasma etching of copper films at low temperature
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High performance and highly reliable novel CMOS devices using accumulation mode multi-gate and fully depleted SOI MOSFETs
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Atomic - vapour - deposited HfO2 and Sr4Ta2O9 layers for metal-insulator-metal applications
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Comparing GaAs and In0.15Ga0.85As as channel material for alternative substrate CMOS
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Monte Carlo simulations of InGaAs nano-MOSFETs
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Impact of weak Fermi-level pinning on the correct interpretation of III-V MOS C-V and G-V characteristics
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In-situ MBE Si as passivating interlayer on GaAs for HfO2 MOSCAP’s: effect of GaAs surface reconstruction
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Compound semiconductor MOSFETs
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Investigation of polarization mechanisms on unibond buried oxide layer
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Dose rate dependence of the back gate degradation in thin gate oxide PD-SOI MOSFETs by 2-MeV electron irradiation
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Low temperature influence on the uniaxially strained FD SOI nMOSFETs behavior
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Process-variation- and random-dopants-induced threshold voltage fluctuations in nanoscale CMOS and SOI devices
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Comparison of stressed Poly-Si and TiN gated Hf-based NMOSFETs characteristics, modeling and their impact on circuits performance
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CMOS gate oxide defects induced by pre-gate plasma process
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Negative-gate to substrate erase transient simulation for flash memory
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Fin-height controlled TiN-gate FinFET CMOS based on experimental mobility
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Independent double-gate FinFETs with asymmetric gate stacks
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Oxide interface studies using second harmonic generation
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Concurrent HCI-NBTI: worst case degradation condition for 65 nm p-channel SOI MOSFETs
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Electrical stress on irradiated thin gate oxide partially depleted SOI nMOSFETs
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The impact of mobility enhanced technology on device performance and reliability for sub-90 nm SOI nMOSFETs
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Electrical and reliability characterization of metal-gate/HfO2/Ge FET’s with Si passivation
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High performance, uniaxially-strained, silicon and germanium, double-gate p-MOSFETs
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Interrelationship between electrical and physical properties of subcritical Si-Ge layers grown directly on silicon for short channel high-performance pMOSFETs
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Electronic structure of insulator-confined ultra-thin Si channels
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Ab initio study of high permittivity phase stabilization in HfSiO
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Fabrication of three-dimensional nanoimprint mold using inorganic resist in low accelerating voltage electron beam lithography
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Observation of the internal defects of multilayer film
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Actinic inspection of EUVL mask blank defects by photoemission electron microscopy: Effect of inspection wavelength variation
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Investigation of the separation of 3D-structures with undercuts
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Thermal imprint lithography using sub-micron sized nickel template coated with thin SiO2 layer
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3D structural templates for UV-NIL fabricated with gray-scale lithography
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Dimensional stability in step & repeat UV-nanoimprint lithography
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Fluorinated materials for UV nanoimprint lithography
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The UV-nanoimprint lithography equipment with multi-head imprinting unit for sub-50 nm half-pitch patterns
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Fingerprint stamp for evaluation of polymer flow time constants in thermal nanoimprint
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3D structures for UV-NIL template fabrication with grayscale e-beam lithography
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Flow property measurements for nanoimprint simulation
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Embedded nano channels fabricated by non-selective reverse contact UV nanoimprint lithography technique
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Process impact of mask grid variation
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Nanoimprinted reflecting gratings for long-range surface plasmon polaritons
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Nano-graphoepitaxy of semiconductors for 3D integration
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Coarse-grain method for modeling of stamp and substrate deformation in nanoimprint
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Micro-aspiration assisted lithography
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Structure size dependent recovery of thin polystyrene layers in thermal imprint lithography
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CD and IP accuracy in electron beam character projection technology
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Morphological and electrical study of FIB deposited amorphous W nanowires
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Fabricating nanoscale device features using the 2-step NERIME nanolithography process
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Focused-ion-beam direct structuring of fused silica for fabrication of nano-imprinting templates
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Analysis of pattern-dependent image placement of single-membrane stencil masks for electron-beam lithography
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Design and measurement of nanopatterns for FIB reliability assessments
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Molecular roughness analysis of developed resist by LER method
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Patterning of Ge2Sb2Te5 phase change material using UV nano-imprint lithography
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Properties of ALD HfTaxOy high-k layers deposited on chemical silicon oxide
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Analysis of low temperature RTP needs for IC metallization
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Integrated monitoring of ULK dielectrics out-gassing and measurement of pore sealing efficiency by residual gas analysis technique
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Surface properties restoration and passivation of high porosity ultra low-k dielectric (k ∼ 2.3) after direct-CMP
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Thermal stability and gap-fill properties of spin-on MSQ low-k dielectrics
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Stress evolution during Ni–Si compound formation for fully silicided (FUSI) gates
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Table of Contents
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Comparative study of e-beam resist processes at different development temperature
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Simulation and analysis for microstructure profile of optical lithography based on SU-8 thick resist
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Electron beam lithography at 10 keV using an epoxy based high resolution negative resist
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Fabrication of vertical optical interconnecting structure using photoresist reflowed mold structures
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Fogging effect correction method in high-resolution electron beam lithography
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LER evaluation of molecular resist for EUV lithography
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Fast electron resist contrast determination by “fitting before measurement” approach
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Improving the sensitivity and line edge roughness in inorganic positive electron beam resist
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Stochastic simulation studies of molecular resists
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Combined electron beam and UV lithography in SU-8
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Leaching mechanisms in immersion lithography with or without top coat
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Supercritical drying for high aspect-ratio HSQ nano-structures
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Micro/nano-heater integrated cantilevers for micro/nano-lithography applications
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Surface-plasmon polariton interference nanolithography based on end-fire coupling
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CD control of direct versus complementary exposure for shaped beam writers and its correlation to the local registration error
Fulltext Access 4 Pages 2007
Theoretical investigation of pattern printability of oxidized Si and Ru capping models for extreme ultraviolet lithography (EUVL)
Fulltext Access 4 Pages 2007
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